Renesas Expands Data Center Solutions Portfolio with CK440Q-Compliant Clock Generator

Japanese semiconductor specialist Renesas Electronics Corporation has announced the availability of the low-jitter 9SQ440 clock generator IC designed for next-generation Intel platforms used in high-performance computing and data center applications.

February 04, 2021. By Manu Tayal

Japanese semiconductor specialist Renesas Electronics Corporation has announced the availability of the low-jitter 9SQ440 clock generator IC designed for next-generation Intel platforms used in high-performance computing and data center applications.

The latest in a long line of PCIe industry firsts from Renesas, the 9SQ440 is the industry’s first CK440Q-compliant server clock generator. Developed for the Intel CK440Q specification and future Intel® Xeon® processor requirements, the 9SQ440 provides customers a flexible, robust, and high-performance synthesizer to address PCIe Gen5 design challenges.

Customers can combine the newest member of Renesas’ comprehensive portfolio of data center solutions with the company’s broader lineup of PCIe timing solutions, including PCIe Gen5 clock buffers, and its portfolio of infrastructure power and smart power stage (SPS) devices to address their complete data center solution needs.

“PCIe clock generators are the heart of PCIe timing and with tighter specification requirements for the latest standard, PCIe Gen5-compliant clock generators like the 9SQ440 provide significant design flexibility and margin for customers,” said Bobby Matinpour, Vice President, Data Center Business Division at Renesas. “Leveraging our industry-leading timing technology and IP, we are excited to continue bringing industry-first production-qualified devices to market for PCIe Gen5 and beyond with PCIe Gen6-ready devices.”

The 9SQ440 serves as a centralized clock generator for server CPU and PCIe clocks. It features a total of 20 differential outputs as well as industry-leading jitter performance – less than 50fs RMS of PCIe Gen5 common clock phase jitter – to meet the timing requirements for topologies ranging from simple, single-board 2-socket to complex, modular multi-socket systems.

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